Nvidia has taped out six Rubin architecture chips at TSMC, featuring 3nm N3P chiplets, HBM4 support, and 4x reticle design. This comprehensive platform overhaul covers GPUs, CPUs, networking, and silicon photonics.

Nvidia CEO Jensen Huang revealed recently during his trip to Taiwan that the company has successfully taped out six different Rubin architecture chips. The new chips are now at TSMC, undergoing testing while also preparing for trial production.

This marks a comprehensive architecture overhaul rather than the typical incremental GPU refresh. Instead of standard improvements to just the GPU, it's a platform overhaul that spans CPUs, multiple GPU variants, a scale-up NVLink switch, networking silicon, and a silicon-photonics processor for rack-scale optical links. Nvidia will implement chiplet design for the first time, utilizing TSMC's highly advanced 3nm N3P process node with CoWos-L packaging. The architecture will feature a larger 4x reticle design, an increase from the current Blackwell 3.3x reticle size.

Nvidia says the new Rubin R100 GPUs are set to adopt next-generation HBM4 stacks, with customized base dies to sustain higher bandwidth and power delivery at scale versus today's HBM3E. The new platform represents a generational leap comparable to what Hopper achieved in terms of computational capabilities. Early validation tests are already running to test thermal performance, power consumption, and interconnect efficiency.

The Rubin platform aims to meet the growing needs of large data centers as AI workloads expand. Nvidia is also updating its software tools, so developers can use the new features and connections right away.

Nvidia plans to launch the Rubin family of chips around 2026, with Rubin Ultra coming the year after. The schedule depends on TSMC's production capacity and readiness. During his visit, Huang thanked TSMC staff for their key role in making Rubin possible.